Just to double check the numbers I calculated on Tuesday I ran some wet-wet trials with 100K and 300K Nanoseps. Based on the wet-dry results we would expect that the permeability for the 100K Nanosep would be higher than that of the 100K Microcon. It goes without saying that the 300K Nanosep would also be higher.
As shown, the results are similar in trend to those obtained in the wet-dry tests.
In collaboration with Alex Shestopalov’s lab, I started working on liquid based PEG treatment on windowed sepcon chips. The treatment is a 3-day long protocol and involves multiple washing and drying steps with different reagents. Most of our sepcon chips broke down in first few steps itself. The initial wash consists of Nanostrip (sulfuric plus nitric…
This experiment is to determine if the time between the SC1 clean and when the wafers get deposited matter. Currently there is suspicion that an SC1 from an RCA clean should at RIT should be done right before deposition, . So what is done typically is that lithography steps are done weekly at RIT to…
Here is the current method that I am following to find the pore statistics: 1. Select the highest threshold that you can still close with disk of 3 2. Hit majority 3. Close w/ 3 4. — Try open w/ 3 5. Erode w/ 3 6. Dilate w/2 7. Dilate w/ 2 8. Erode w/…
We have had success cross-linking PEG to TEOS membranes pretreated with TPM to aid in adhesion. This was done first on nonporous membranes, and then porous. We used 50% PEG at 1.5% cross-linker, which cross-linked at 8000ms. For comparison, 100% PEG at 3% cross-linker cross-linked at 5500ms. Nonporous TEOS Bottom image is at 4x. The…
Today I etched wafer 621, which is the pair to 620. While w620 has a relatively low pinhole density, w621 shows a much higher occurence of defects. Since the front-end processing and thermal treatment was identical for these wafers, I believe that the variability lies in the etch process. Looking at the two wafers side-by-side,…
Starting in July of 2021, we began a new idea fabricating the nano pocket membrane to capture and release the EVs. From then until now we have successfully fabricated nano pocket membranes by using a lithography method. We faced challenges in parylene etching and resolve it by using two etching machines, i.e. Trion Phantom…
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With numbers like this we’ll need to develop comparisons to track etched membranes for publication. That is what the CNT folks did and I think its justifiable based on the fact that we are comparing membranes with defined pores.
I’ve asked Tom to think about how we might assemble the track etched membranes into the Microcon or Nanosep devices (after removing the manufacturer’s membranes). Brace yourself for a whole new set of experiments with track etched membranes!