Wafer 398

Wafer 398 was deposited on 2/14/2008 but just etched yesterday in the new cell (it’s a beauty esp. when you compare it to the old one). I’ve etched several wafers now in the new cell and none of the membranes show signs of cigarette burns or tears. Good news in regards to the copper contamination issue. Chris and I are going to be trained on Brian’s new SEM next week, and will be able to run elemental analysis with the EDX on this latest set of wafers.

398 has a 40 nm sputtered oxide with a 15 nm silicon layer inbetween. I have etched several TEOS wafers, but they turned out to have a high density of round pinholes. Our initial hypothesis is that the adhesion between the sputtered amorphous silicon and TEOS is not as strong as the a-Si to the sputtered SiO2. Local delamination causes pinholes. JP’s senior design should provide some insight: he’s comparing the properities of thermal vs.sputtered vs. TEOS using stress/strain measurements as a metric.

So there seems to be a trade-off right now between the TEOS and sputtered oxide processes. TEOS gives us wafer uniformity but very few usable membranes whereas sputtered oxide wafers gives high yield with poor uniformity. Obviously we’ll just have to live with the non-uniformity for now until we sort this all out…

wafer 398 tem images

from left to right: (0,0), (-3,0), (0,-4) all at 35kx magnification

The edges are relatively clean and free of debris. More importantly, there are no tears! The dark spots in the intermediate band between the membrane and bulk silicon could be unetched silicon. The corner image on the right is cool because there is a “halo” around pores that lie on the border of the bulk/freestanding area. In areas where there are pores, there’s a faster underetch of the oxide layer because HF can attack from the front and back.