A New Platform for Pressure-Driven Voltage-Gated Separations
I’ve been trying for some time to make chips that can dynamically change their surface charge. To this end I’ve made the following NFT chips, which have 12 nm of silver coated in 10 nm alumina:
Note the Aluminum foil coating the insides of the gel box. The silver layer is either photoactive or prone to oxidation (or both) and the chips seem to degrade on the order of one week. The darkbox attempts to mitigate this.
These chips I then placed in sepcon baskets I had modified with a razor blade and a steady hand.
(Note that I took these lovely pictures with a macro lens specially designed for use with my smartphone)
Next a second Ag/AgCl electrode was added to the top to provide a reference (we can’t pump -2 V into the gate unless we can answer the question “-2 V with respect to what?” – this electrode is our answer to that question). A small length of silver wire was soaked in bleach for ~1 hr. as suggested by Vincent’s excellent protocol – available here:
A small hole was poked into the middle of the inner sepcon basket with a needle, the bleach-coated end was threaded through, and the hole was sealed with silver epoxy. The end result is pictured below:
These (Greg waggishly pointed out) look almost exactly like the evil alien race of Daleks from the British television show “Dr. Who”:
The final ‘Dalek’ device is shown in operation below:
Note the use of the micromanipulator to keep the stress off the bond between the wire and the chip. The bond occupies a very small surface area and is prone to failure if a system like this isn’t used.
Here are some views of the bottom of the chip as seen with a small mirror:
The devices had no leaks at pressures up to 5 psi (typically the chips broke before the devices leaked). I was working with chips from the outer edge of wafer # 1024, which is supposed to have ~20% porosity and ~55 nm pore sizes, but the 10 nm of alumina seem to almost totally occlude the pores, resulting in very very low hydraulic permeabilities (~40 minutes to collect ~16 uL of filtrate) and necessitating very small gold nanoparticles (via analogy to this set of data:
I started with 20 nm gold nanoparticles, but I only saw gold in the filtrate with 5 nm gold nanoparticles). Unfortunately, I was not able to collect data showing a difference in the sieving behavior in the -1 V and 0 V cases, which is the whole point of this process, but I ran out of time before BMES. I will be repeating this with fresh chips soon from one of our many new wafers.


























