Possible Model For Explaining Pinhole Formation
1) Why we are not seeing pinhole formation in Sb-doped wafers
2) Why EDP is enhanced when etching Sb-doped wafers (~an hour less etch time)
CZ silicon normally contains 10-20 ppm (~10^18/cm^-3) oxygen. Oxygen precipitates are usually contained in the substrate (by epitaxial layer or denuded zone) because they are helpful in trapping unwanted metal ions. I believe that our pinholes, however, are formed from oxygen precipitates migrating from the bulk Silicon into our film stack during high thermal processing, (such as deposition, RTP, and etch).
After doing some research, I’ve uncovered that Sb-doped silicon substrates are often used for gettering oxygen precipitates in bulk Si. Sb attracts impurities mainly because of its high atomic # (51). It is large enough to “deform” the Silicon lattice, creating trap centers (often oxygen for Sb).
We haven’t been seeing pinholes on the Sb substrate samples because the oxygen precipitates have been attracted to the Sb gettering sites in the Silicon lattice, i.e. it is more favorable for the oxygen precipitates to migrate into trap sites then up through a film stack. This also explains why, during the Silicon etch, Sb-doped wafers etch faster than phosphorous-doped wafers: The EDP is enhanced by the trapped oxygen in the substrate.
Thoughts?
Thanks JP. We discussed this at the group meeting and it got a bunch of reflective nods yes. I think this is the leading theory given the recent evidence that particle contamination is not as important as we thought.
Can someone summarize (again) why we are working with the two types of wafers?